Soc Design Engineer – Rtl Design And Integration

Intel Retiree Medical Plan Trust

Hillsboro, Oregon, US
Base: $122,440.00-172,860.00 usd; bonus/equity: st...
Rtl and upf design
Cpu microarchitecture
Clock and reset domain crossings
Develops the logic design, register transfer level (RTL) coding, and simulation for a CPU required to generate cell libraries, functional units, and the CPU IP block for integration in full chip designs

Job Summary

  • Develops the logic design, register transfer level (RTL) coding, and simulation for a CPU required to generate cell libraries, functional units, and the CPU IP block for integration in full chip designs.
  • Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation.
  • We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.

Matching Summary

Develops the logic design, register transfer level (RTL) coding, and simulation for a CPU required to generate cell libraries, functional units, and the CPU IP block for integration in full chip designs.

Salary

Base: $122,440.00-172,860.00 USD; Bonus/Equity: stock bonuses; Benefits: health, retirement, and vacation

Skills & Requirements

Must-have

  • RTL and UPF design
  • CPU microarchitecture
  • Clock and reset domain crossings
  • Design power considerations
  • Design clocking considerations

Nice-to-have

  • Product development on leading edge
  • Python programming language

Key Requirements

  • Bachelor's degree with 3+ years experience
  • Master's degree with 2+ years experience
  • 6+ years experience in RTL design or integration

Work Rights

Not specified

Tailored Resume

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