Principal Engineer, Process Development Engineering

Analog Devices

Limerick, Ireland
Esd protection design, simulation, verification
Develop protection devices and circuits
Electrical, esd, and reliability testing
Lead chip-level and IP-level ESD protection design, simulation, and verification

Job Summary

  • Lead chip-level and IP-level ESD protection design, simulation, and verification.
  • Conduct electrical, ESD, and reliability testing of devices to create design rules.
  • Mentor junior engineers on ESD principles and design techniques.

Matching Summary

Lead chip-level and IP-level ESD protection design, simulation, and verification.

Skills & Requirements

Must-have

  • ESD protection design, simulation, verification
  • Develop protection devices and circuits
  • Electrical, ESD, and reliability testing
  • Define ESD, EOS, Latch-up methodologies
  • Technical interface between teams and foundries
  • Failure and root cause analysis

Nice-to-have

  • Open to challenges
  • Strong initiative
  • Independent worker
  • Team player

Key Requirements

  • Bachelor's (10+ years), Master's (8+ years), or PhD (5+ years) in EE
  • Coursework/experience with integrated circuit design
  • Solid understanding of device physics
  • Background in ESD protection circuit design techniques
  • Experienced with circuit simulation and parasitic extraction
  • Experience with Cadence, Virtuoso
  • Familiar with PERC
  • Experience/knowledge of ESD simulation tools
  • Solid understanding of HBM, CDM, IEC-61000-4-2 models
  • Experienced with Transmission Line Pulse device/product measurement

Work Rights

Not specified

Tailored Resume

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