Senior Layout Design Engineer

Intel Retiree Medical Plan Trust

Guadalajara, Mexico
Hybrid
Analog and mixed-signal layout design
Leading-edge process nodes
Cadence virtuoso, synopsys, mentor calibre
Architect and implement complex analog and mixed-signal layouts for IO IPs on leading-edge process nodes

Job Summary

  • Architect and implement complex analog and mixed-signal layouts for IO IPs on leading-edge process nodes.
  • Act as a technical anchor across global sites, ensuring seamless project hand-offs and maintaining design consistency.
  • Identify bottlenecks in the design flow and develop new CAD-based automations or scripting solutions to enhance team productivity.

Matching Summary

Architect and implement complex analog and mixed-signal layouts for IO IPs on leading-edge process nodes.

Skills & Requirements

Must-have

  • Analog and mixed-signal layout design
  • Leading-edge process nodes
  • Cadence Virtuoso, Synopsys, Mentor Calibre
  • DRC, LVS, antenna, EM, IR drop analysis
  • Scripting for automation (SKILL, Python, Perl)

Nice-to-have

  • Global technical leadership
  • Cross-functional collaboration
  • Mentorship and peer review

Key Requirements

  • Bachelor's degree in Electrical Engineering or related
  • 6+ years of experience in custom layout design
  • Experience with EDA tools and CMOS processes
  • Unix/Linux environment expertise
  • Advanced English level

Work Rights

Must have unrestricted, permanent right to work in Mexico

Tailored Resume

Cover Letter