Cpu Core Physical Design Engineer

Intel

Folsom, California, United States
Base: $105,650.00-200,340.00 usd; bonus/equity: st...
Hybrid
Vlsi circuit design and synthesis experience
Static timing analysis proficiency
Low power design methodology knowledge
The Full Chip Timing Design Automation team enables seamless timing closure and optimization across the entire backend flow

Job Summary

  • The Full Chip Timing Design Automation team enables seamless timing closure and optimization across the entire backend flow.
  • Responsibilities include performing physical design implementation of custom CPU designs from RTL to GDS ready for manufacturing.
  • Intel offers a competitive total compensation package including stock bonuses, health benefits, and retirement programs.

Matching Summary

The Full Chip Timing Design Automation team enables seamless timing closure and optimization across the entire backend flow.

Salary

Base: $105,650.00-200,340.00 USD; Bonus/Equity: Stock bonuses included; Benefits: Health, retirement, vacation

Skills & Requirements

Must-have

  • VLSI circuit design and synthesis experience
  • Static timing analysis proficiency
  • Low power design methodology knowledge
  • RTL to GDS physical design flow expertise

Nice-to-have

  • x86 CPU architecture background
  • TCL Perl Python programming skills
  • Collaboration with EDA vendors
  • Power frequency area optimization focus

Key Requirements

  • Bachelor's or Master's degree in STEM field
  • Minimum 1 year VLSI circuit design experience
  • Experience with static timing analysis and low power design

Work Rights

Not specified

Tailored Resume

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