Reliability Verification Technical Manager

Intel

Bangalore, India
Hybrid
Asic em/ir flow methodologies
Esd perc flow methodologies
Pdk development and quality assurance
Lead, develop, and manage a team of PDK and design methodology engineers to deliver robust PDK collateral for internal and external design communities for ASIC EM/IR, ESD PERC and High Voltage domain check methodologies

Job Summary

  • Lead, develop, and manage a team of PDK and design methodology engineers to deliver robust PDK collateral for internal and external design communities for ASIC EM/IR, ESD PERC and High Voltage domain check methodologies.
  • Drive innovation in tools, flows, and methods to optimize design functions such as circuit design, physical design, and verification.
  • Foster a productive work environment by setting clear goals, maintaining accountability, and supporting differentiated performance management.

Matching Summary

Lead, develop, and manage a team of PDK and design methodology engineers to deliver robust PDK collateral for internal and external design communities for ASIC EM/IR, ESD PERC and High Voltage domain check methodologies.

Skills & Requirements

Must-have

  • ASIC EM/IR Flow methodologies
  • ESD PERC flow methodologies
  • PDK development and quality assurance
  • Proficiency in EDA tools
  • Manage a high-functioning team

Nice-to-have

  • Build and evolve organizational capabilities
  • Continuous improvement mindset
  • Engage across organizational levels

Key Requirements

  • 10+ years of industry experience with a Bachelor's degree
  • 2+ year experience in managing a team
  • Bachelor's degree in Electronics, Computer Science, or related field

Work Rights

Not specified

Tailored Resume

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