Cache Senior Design Engineer For The New Ai Group

Intel Retiree Medical Plan Trust

Petah Tikva, Israel
Hybrid
10+ years block level design experience
3+ years cache systems experience
System verilog proficiency required
The role involves designing and implementing IP solutions for cutting-edge AI products within the Habana group at Intel

Job Summary

  • The role involves designing and implementing IP solutions for cutting-edge AI products within the Habana group at Intel.
  • Candidates must possess extensive experience in block-level design and specific expertise in cache systems architecture.
  • This position requires strong System Verilog skills to solve timing paths and optimize component area.

Matching Summary

The role involves designing and implementing IP solutions for cutting-edge AI products within the Habana group at Intel.

Skills & Requirements

Must-have

  • 10+ years block level design experience
  • 3+ years cache systems experience
  • System Verilog proficiency required
  • Timing path solving skills
  • RTL restructuring and area reduction

Nice-to-have

  • Strong communication and teamwork
  • Ownership and accountability mindset
  • Analytical problem-solving abilities

Key Requirements

  • B.Sc. in Electrical or Computer Engineering
  • At least 10 years of block level design experience
  • At least 3 years of cache systems experience

Work Rights

Not specified

Tailored Resume

Cover Letter