R&d Physical Design Engineer

Broadcom

Shanghai, China
Physical design floor planning
Placement and design closure
Static timing analysis (sta)
Candidates are expected to develop strong skills in physical design including floor planning, placement, design closure, STA, and DRC & LVS

Job Summary

  • Candidates are expected to develop strong skills in physical design including floor planning, placement, design closure, STA, and DRC & LVS.
  • Experience running full chip signoff tasks such as PI, SI, PV and STA is preferred.
  • Broadcom is an equal opportunity employer and considers qualified applicants without regard to various protected characteristics.

Matching Summary

Candidates are expected to develop strong skills in physical design including floor planning, placement, design closure, STA, and DRC & LVS.

Skills & Requirements

Must-have

  • Physical design floor planning
  • Placement and design closure
  • Static timing analysis (STA)
  • Design rule check (DRC) and layout versus schematic (LVS)
  • Full chip signoff tasks
  • Tapeout experience in 7nm and below

Nice-to-have

  • DFT insertion knowledge
  • Power/IVD analysis experience
  • Strong communication skills
  • Problem solving skills
  • Perl/Tcl scripting skills

Key Requirements

  • 7+ years MS degree preferred
  • Background in microelectronics or related discipline
  • Good understanding of ASIC design flow
  • Ability to handle block implementation and top level tasks independently

Work Rights

Not specified

Tailored Resume

Cover Letter