Front End Asic Rtl/logic Verification Engineer

Altera Corporation

Penang, Malaysia
Not specified
Rtl coding proficiency using hdl languages
Logic simulation and debug environment experience
Strong problem solving and analytical skills
Altera Corporation is seeking a Front End ASIC RTL/Logic Verification Engineer in Penang, Malaysia. The role focuses on developing verification plans for design features, ensuring high-quality integration, and resolving issues in RTL tests while requiring strong communication and problem-solving skills

Job Summary

  • The role involves developing comprehensive verification plans to ensure design features are correctly validated.
  • Candidates will support SoC customers by ensuring high-quality integration and verification of IP blocks.
  • The position requires driving quality assurance compliance to facilitate smooth IP-SoC handoffs.

Matching Summary

Match Score: 85

Altera Corporation is seeking a Front End ASIC RTL/Logic Verification Engineer in Penang, Malaysia. The role focuses on developing verification plans for design features, ensuring high-quality integration, and resolving issues in RTL tests while requiring strong communication and problem-solving skills.

Skills & Requirements

Must-have

  • RTL coding proficiency using HDL languages
  • Logic simulation and debug environment experience
  • Strong problem solving and analytical skills

Nice-to-have

  • Scripting knowledge advantage
  • Leadership and communication skills
  • SoC customer support experience

Key Requirements

  • BS/MS or PhD in Electronics Engineering
  • Proficiency with RTL coding and HDL languages
  • Familiarity with logic simulation environments

Work Rights

Not specified

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