Soc Digital Physical Design Engineer - Mcu

NXP Semiconductors

Catania, Italy
Physical design implementation
Rtl to gdsii flow
Advanced methodologies
NXP is building new teams in Catania to create high impact microcontrollers (MCU) as part of NXP’s intelligent AI at the Edge

Job Summary

  • NXP is building new teams in Catania to create high impact microcontrollers (MCU) as part of NXP’s intelligent AI at the Edge.
  • Lead projects and execute the full physical design flow for complex digital blocks and top-level SoCs, including floorplanning, power planning, synthesis, place and route, clock tree synthesis, static timing analysis (STA), formal verification, and physical verification (DRC/LVS).
  • We aim to create an inclusive work environment and we will not tolerate racism, discrimination or harassment of any kind.

Matching Summary

NXP is building new teams in Catania to create high impact microcontrollers (MCU) as part of NXP’s intelligent AI at the Edge.

Skills & Requirements

Must-have

  • physical design implementation
  • RTL to GDSII flow
  • advanced methodologies
  • timing closure
  • power integrity analysis
  • physical verification

Nice-to-have

  • technical leadership role
  • collaborative team environment
  • sustainable future
  • inclusive work environment

Key Requirements

  • Master's degree in Electrical Engineering
  • Working knowledge on advance tech nodes 16ff and below
  • Expert-level proficiency with industry-standard EDA tools
  • Deep understanding of physical design flow
  • Strong expertise in timing closure
  • Proficiency in scripting languages

Work Rights

Not specified

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