This role requires leading the design and development of SerDes system models and DSP algorithms for next-generation products
Job Summary
This role requires leading the design and development of SerDes system models and DSP algorithms for next-generation products.
Candidates must have deep practical experience with SerDes architectures, including signal integrity, jitter, and noise analysis.
The position involves driving post-silicon validation strategies and collaborating with digital architecture teams to ensure successful chip integration.
Matching Summary
This role requires leading the design and development of SerDes system models and DSP algorithms for next-generation products.
Skills & Requirements
Must-have
SerDes and PHY architecture experience
DSP algorithm development and equalization
Post-silicon validation and debug strategies
High-speed serial communication standards knowledge
RTL implementation and hardware integration
Nice-to-have
Firmware or embedded software experience
ML/AI-based techniques for link performance
Cross-functional team leadership skills
Roadmap definition and industry best practices
Key Requirements
Bachelor's or Master's degree in Electrical Engineering
Minimum 8+ years of hands-on SerDes and PHY experience
Proven post-silicon validation and root-cause analysis experience