Product Soc Architect

Intel Retiree Medical Plan Trust

Santa Clara, California, United States
Base: $190,610.00-311,890.00 usd; bonus/equity: st...
Hybrid
8+ years soc cpu subsystem architecture experience
Networking performance engineering expertise
High-speed ethernet packet processing knowledge
The Intel Retiree Medical Plan Trust is seeking a Senior IPU SoC Architect to lead the architectural vision for advanced Infrastructure Processing Unit (IPU) and Data Processing Unit (DPU) platforms. The role requires extensive experience in SoC architecture, networking, and performance engineering, with a focus on developing scalable solutions for next-generation data center technologies

Job Summary

  • This strategic role involves defining the architectural vision for next-generation Infrastructure Processing Unit platforms to ensure optimal end-to-end performance.
  • Candidates will lead comprehensive architecture development from initial concept through silicon implementation while establishing performance benchmarks and validation methodologies.
  • The position offers a competitive compensation package including stock bonuses and extensive benefit programs within Intel's Central Engineering Group.

Matching Summary

Match Score: 85

The Intel Retiree Medical Plan Trust is seeking a Senior IPU SoC Architect to lead the architectural vision for advanced Infrastructure Processing Unit (IPU) and Data Processing Unit (DPU) platforms. The role requires extensive experience in SoC architecture, networking, and performance engineering, with a focus on developing scalable solutions for next-generation data center technologies.

Salary

Base: $190,610.00-311,890.00 USD; Bonus/Equity: Stock bonuses included; Benefits: Health, retirement, and vacation programs

Skills & Requirements

Must-have

  • 8+ years SoC CPU subsystem architecture experience
  • Networking performance engineering expertise
  • High-speed Ethernet packet processing knowledge
  • Memory subsystem architecture design skills
  • Virtualization SMMU/IOMMU architecture experience

Nice-to-have

  • Post Graduate degree in Electrical or Computer Engineering
  • ARM/x86 NUMA systems and cache coherency experience
  • Experience with IPU SmartNIC accelerator centric SoCs
  • Familiarity with PCIe CXL memory semantics
  • Track record of multi-generation architectural ownership

Key Requirements

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or STEM field
  • 8+ years of SoC CPU or subsystem architecture experience
  • Proven leadership in compute and memory system design
  • Experience defining performance workload methodologies and KPI-driven validation

Work Rights

Not specified

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