Design various mixed-signal circuit designs on Altera FPGAs such as voltage regulators, bandgaps and bias circuits, Analog to digital converter (ADC), Delay locked loops (DLLs), high speed clock distribution and other clocking circuits
Job Summary
Design various mixed-signal circuit designs on Altera FPGAs such as voltage regulators, bandgaps and bias circuits, Analog to digital converter (ADC), Delay locked loops (DLLs), high speed clock distribution and other clocking circuits.
Deliver all aspects of the design and collateral, including timing and reliability collateral, and drive transitions to AI tool-based design.
Collaborate with logic designer, logic verification designer, structural physical design engineers, integration engineers, signal integrity and power deliver engineer to define clear collateral handoff requirements.
Matching Summary
Design various mixed-signal circuit designs on Altera FPGAs such as voltage regulators, bandgaps and bias circuits, Analog to digital converter (ADC), Delay locked loops (DLLs), high speed clock distribution and other clocking circuits.