Semi-Conductor Design Verification Engineer

REALTEK SINGAPORE PRIVATE LIMITED

Singapore, Singapore
Systemverilog uvm experience
Asic verification methodology
Soc architecture definition understanding
The role involves developing detailed module level and SoC level testplans based on design specifications

Job Summary

  • The role involves developing detailed module level and SoC level testplans based on design specifications.
  • Candidates must build ASIC verification environments including stimulus, checkers, assertions, monitors, and scoreboards.
  • The position requires executing verification plans and collaborating with the digital design team to debug functional testcases.

Matching Summary

Match Score: 75

The role involves developing detailed module level and SoC level testplans based on design specifications.

Skills & Requirements

Must-have

  • SystemVerilog UVM experience
  • ASIC verification methodology
  • SoC architecture definition understanding

Nice-to-have

  • High speed custom VLSI products exposure
  • Strong communication skills
  • Fast moving dynamic environment adaptability

Key Requirements

  • BSEE or MSEE degree required
  • Entry level experience acceptable
  • Hardware functional verification language skills

Work Rights

Not specified

Tailored Resume

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