Soc Physical Design And Sta Methodology Engineer

Samsung Semiconductor India Research (SSIR)

Bangalore, India
Soc physical design flow development
Python tcl perl scripting for eda
Synopsys cadence pnr and signoff tools
The role focuses on developing production-grade PnR flows and methodologies rather than just block implementation

Job Summary

  • The role focuses on developing production-grade PnR flows and methodologies rather than just block implementation.
  • Engineers will work on cutting-edge technologies including AI/ML, 5G/6G solutions, and Neural processors at Samsung Semiconductor India Research.
  • Candidates are expected to build automation utilities to improve PPA, runtime, and ease of use for design teams.

Matching Summary

The role focuses on developing production-grade PnR flows and methodologies rather than just block implementation.

Skills & Requirements

Must-have

  • SoC Physical Design flow development
  • Python Tcl Perl scripting for EDA
  • Synopsys Cadence PnR and Signoff tools
  • STA fundamentals SDC constraints timing debug
  • Low power UPF multi-voltage design experience
  • Hierarchical STA and chip-top integration

Nice-to-have

  • AI-driven optimization tool experience DSO.ai
  • Advanced ECO tool expertise Tweaker PrimeClosure
  • Formal verification LEC methodology knowledge
  • DTCO and advanced node 3nm 2nm exposure
  • Training design teams on methodology best practices

Key Requirements

  • 5 to 8 years of relevant experience
  • B.Tech/B.E/M.Tech/M.E degree qualification
  • Proven track record in flow and methodology development

Work Rights

Not specified

Tailored Resume

Cover Letter