Analog Layout Staff Engineer

Marvell

Bangalore, India
High-speed analog layout development
Cadence virtuoso expertise
Full-custom circuit layout experience
Marvell’s Central Engineering team drives the development of advanced SoCs across various end markets

Job Summary

  • Marvell’s Central Engineering team drives the development of advanced SoCs across various end markets.
  • You will play a leading role in developing next-generation high-speed SerDes IPs using advanced FinFET technologies.
  • Marvell offers a collaborative environment that fosters innovation and personal growth.

Matching Summary

Marvell’s Central Engineering team drives the development of advanced SoCs across various end markets.

Skills & Requirements

Must-have

  • high-speed analog layout development
  • Cadence Virtuoso expertise
  • full-custom circuit layout experience

Nice-to-have

  • scripting skills for automation
  • excellent communication skills
  • self-motivated and adaptable

Key Requirements

  • 6–10 years of experience
  • BE/B.Tech or MS/M.Tech in Electrical/Electronics Engineering
  • strong understanding of semiconductor process technologies

Work Rights

Not specified

Tailored Resume

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