Job Summary

• Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing.
• Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, static timing analysis, and power/clock distribution.
• Possesses design optimization knowledge to improve product-level parameters such as power, frequency, and area.

Matching Summary

Skills & Requirements

Key Requirements

• 5+ years relevant experience
• Multiple tape-out experience
• Deep submicron process nodes
• Scripting languages (Perl, TCL, Python)
• VHDL and Verilog knowledge
• Mentoring junior team members

Work Rights