Define product feature and capabilities and own the architecture for compute, memory, interconnect & high-speed interface subsystems in the AI inference chip
Job Summary
Define product feature and capabilities and own the architecture for compute, memory, interconnect & high-speed interface subsystems in the AI inference chip.
Collaborate closely with various software teams to co-optimize hardware features for real-world AI inference workloads.
Develop and maintain high-level architecture and performance models and use simulation to guide RTL-level improvements.
Matching Summary
Define product feature and capabilities and own the architecture for compute, memory, interconnect & high-speed interface subsystems in the AI inference chip.