Senior Hardware Asic Arch/design Engineer

NXP USA INC.

Hyderabad, India
On-site
Ai inference chip architecture
Micro-architecture design
Hw-sw co-design
Define product feature and capabilities and own the architecture for compute, memory, interconnect & high-speed interface subsystems in the AI inference chip

Job Summary

  • Define product feature and capabilities and own the architecture for compute, memory, interconnect & high-speed interface subsystems in the AI inference chip.
  • Collaborate closely with various software teams to co-optimize hardware features for real-world AI inference workloads.
  • Develop and maintain high-level architecture and performance models and use simulation to guide RTL-level improvements.

Matching Summary

Define product feature and capabilities and own the architecture for compute, memory, interconnect & high-speed interface subsystems in the AI inference chip.

Skills & Requirements

Must-have

  • AI inference chip architecture
  • micro-architecture design
  • HW-SW co-design
  • performance modeling
  • PPA analysis

Nice-to-have

  • AI workloads optimization
  • high-speed interface design
  • compute subsystem architecture

Key Requirements

  • Senior level experience
  • Experience in AI inference chip design
  • Strong understanding of AI workloads

Work Rights

Not specified

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