2026 Campus - Soc Dft Engineer

NXP USA INC.

Bachelor or master degree in microelectronics
Good knowledge of digital ic design
Strong verilog hdl programming skills
The role involves participating in DFT feature and architecture definition for complex SOC systems

Job Summary

  • The role involves participating in DFT feature and architecture definition for complex SOC systems.
  • Candidates will be responsible for generating DFT test patterns, performing simulations, and debugging issues.
  • Success requires strong collaboration with backend engineers to support timing closure.

Matching Summary

The role involves participating in DFT feature and architecture definition for complex SOC systems.

Skills & Requirements

Must-have

  • Bachelor or master degree in microelectronics
  • Good knowledge of digital IC design
  • Strong Verilog HDL programming skills
  • Commitment to schedule and work quality

Nice-to-have

  • Experience with SCAN, MBIST, and boundary scan
  • Ability to support timing closure with backend engineers
  • Excellent team player with good English capabilities

Key Requirements

  • Degree in microelectronics, electronic engineering, or computer science
  • Knowledge of Scan/ATPG, MBIST, and boundary scan concepts

Work Rights

Not specified

Tailored Resume

Cover Letter