Rtl Power Optimization – New College Grad 2026

Nvidia Corporation

CA, United States
Base: 116,000 usd - 189,750 usd (level 2); 136,000...
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Rtl power optimization
Ai based power optimization solutions
Pre-silicon gate-level power analysis
** Nvidia Corporation is seeking a new college graduate for the role of RTL Power Optimization, focusing on power efficiency in GPU and networking chips. The position requires a background in Electrical or Computer Engineering, with an emphasis on AI, digital design, and VLSI concepts. **

Job Summary

  • You will collaborate with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, and Physical Design teams to study and implement power analysis and reduction techniques for NVIDIA's next generation GPUs and Networking products.
  • Your contributions will help us gain early insight into energy consumption of graphics and artificial intelligence workloads, and will allow us to influence architectural, design, and power management improvements.
  • NVIDIA is widely considered to be one of the technology world's most desirable employers.

Matching Summary

Match Score: 75

** Nvidia Corporation is seeking a new college graduate for the role of RTL Power Optimization, focusing on power efficiency in GPU and networking chips. The position requires a background in Electrical or Computer Engineering, with an emphasis on AI, digital design, and VLSI concepts. **

Salary

Base: 116,000 USD - 189,750 USD (Level 2); 136,000 USD - 218,500 USD (Level 3); Equity and benefits

Skills & Requirements

Must-have

  • RTL power optimization
  • AI based power optimization solutions
  • pre-silicon gate-level power analysis
  • Python programming skills
  • Machine Learning and Artificial Intelligence

Nice-to-have

  • architecture and micro-architecture
  • low-power design patterns
  • backend flows impact on power
  • debugging RTL power anomalies

Key Requirements

  • MS or PhD in Electrical Engineering, Computer Engineering, or related fields
  • Coursework or experience in AI, Digital Design and VLSI concepts
  • Understanding of RTL power optimization fundamentals
  • Knowledge of backend flows
  • Familiarity with RTL implementation of low-power techniques
  • Exposure to industry power analysis tools
  • Coursework and/or hands-on experience in Machine Learning and Artificial Intelligence
  • Previous experience debugging RTL or gate-level power anomalies

Work Rights

Not specified

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