Asic Engineer || Sdc || Design And Timing Constraints | Exp 8+ Years

Cisco

Bangalore, India
Asic subsystems design
Static timing analysis
Sdc development experience
You will contribute to develop next generation networking chips

Job Summary

  • You will contribute to develop next generation networking chips.
  • Help define the process, methods, and tools for design and implementation.
  • At Cisco, we’re revolutionizing how data and infrastructure connect.

Matching Summary

You will contribute to develop next generation networking chips.

Skills & Requirements

Must-have

  • ASIC subsystems design
  • Static Timing Analysis
  • SDC development experience

Nice-to-have

  • Experience with scripting languages
  • Mentoring RTL design owners
  • Collaboration with multi-disciplined teams

Key Requirements

  • Bachelors + 8 years experience
  • Masters + 6 years experience
  • PhD + 1 year experience

Work Rights

Not specified

Tailored Resume

Cover Letter