Senior Technical Program Manager

Cadence

8+ years experience in chip design
3+ years program management experience
Bachelor's degree in engineering
The role involves coordinating R&D Development Projects and Key Customer Engagements within the Design IP Group

Job Summary

  • The role involves coordinating R&D Development Projects and Key Customer Engagements within the Design IP Group.
  • Candidates must have a history of successfully leading designs with end customers and managing project scope and deliverables.
  • The position requires anticipating problems, formulating solutions, and driving issue resolution to ensure on-time project delivery.

Matching Summary

The role involves coordinating R&D Development Projects and Key Customer Engagements within the Design IP Group.

Skills & Requirements

Must-have

  • 8+ years experience in Chip Design
  • 3+ years Program Management experience
  • Bachelor's degree in engineering
  • Digital or mixed-signal IP design knowledge
  • SoC development leadership experience

Nice-to-have

  • Strong ownership and leadership skills
  • Creative and strategic problem solving
  • Excellent verbal and written English
  • Ability to work with multiple functional teams

Key Requirements

  • Bachelor's degree in engineering required
  • MSEE preferred
  • PMP/PgMP certification preferred
  • 8+ years total experience with 3+ in Program Management
  • Knowledge of interface IP like DDR, HBM, Serdes, UCIe

Work Rights

Not specified

Tailored Resume

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