Software Engineering Technical Leader (simulator) - San Jose, Ca

Cisco UK

San Jose, California, United States
Base: $210,600.00 to $305,100.00; bonus/equity: el...
12+ years related experience or masters + 8 years
8+ years hands-on software or asic development
3+ years technical leadership of 5+ engineers
You will play a pivotal role as the technical authority architecting a state-of-the-art functional simulator for Cisco SiliconOne routing and switching devices

Job Summary

  • You will play a pivotal role as the technical authority architecting a state-of-the-art functional simulator for Cisco SiliconOne routing and switching devices.
  • The team offers a unique blend of large organization resources with a startup culture, including on-site amenities like a gym, healthcare, and café.
  • U.S. employees are eligible for comprehensive benefits including medical, dental, vision, 401(k) matching, paid parental leave, and restricted stock units.

Matching Summary

You will play a pivotal role as the technical authority architecting a state-of-the-art functional simulator for Cisco SiliconOne routing and switching devices.

Salary

Base: $210,600.00 to $305,100.00; Bonus/Equity: Eligible for annual bonuses and Cisco restricted stock units; Benefits: Medical, dental, vision, 401(k), paid time off, and wellness days

Skills & Requirements

Must-have

  • 12+ years related experience or Masters + 8 years
  • 8+ years hands-on Software or ASIC development
  • 3+ years technical leadership of 5+ engineers
  • Proficiency in C, C++, System Verilog, or Design Verification

Nice-to-have

  • Prior ASIC functional simulator design experience
  • Background in Data Networks
  • Combined Software and ASIC development expertise
  • Effective communication and problem-solving skills

Key Requirements

  • Bachelor's degree in CS/CE with 12+ years experience
  • Master's degree in CS/CE with 8+ years experience
  • Proven technical leadership in software or ASIC domain
  • Demonstrated programming experience with C/C++ or SystemVerilog

Work Rights

Not specified

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