Silicon Validation Engineer

Hewlett Packard Enterprise

United States
Base: usd 111,000 - 211,000 (colorado); usd 105,50...
Hybrid (2 days onsite per week)
Proficiency with python programming
Experience writing tests for integrated circuits
Working knowledge of verilog or hardware description languages
Hewlett Packard Enterprise is seeking a Silicon Validation Engineer to support the validation of HPE Slingshot™ ASIC products. This hybrid role involves developing and executing chip-level validation tests and requires a solid background in silicon validation, proficiency in Python, and experience with ASIC testing

Job Summary

  • This role supports the validation of HPE Slingshot ASIC products, a high-performance networking interconnect for HPC and AI clusters.
  • The engineer is responsible for developing and executing chip-level validation tests primarily using emulator-based environments and object-oriented Python infrastructure.
  • Hewlett Packard Enterprise offers comprehensive health benefits, professional development programs, and an inclusive culture that values varied backgrounds.

Matching Summary

Match Score: 85

Hewlett Packard Enterprise is seeking a Silicon Validation Engineer to support the validation of HPE Slingshot™ ASIC products. This hybrid role involves developing and executing chip-level validation tests and requires a solid background in silicon validation, proficiency in Python, and experience with ASIC testing.

Salary

Base: USD 111,000 - 211,000 (Colorado); USD 105,500 - 243,000 (Minnesota, Texas, Wisconsin); Variable incentives may also be offered; Benefits: Comprehensive suite supporting physical, financial, and emotional wellbeing

Skills & Requirements

Must-have

  • Proficiency with Python programming
  • Experience writing tests for integrated circuits
  • Working knowledge of Verilog or hardware description languages
  • Experience with ASIC silicon validation
  • Working knowledge of high-speed networking concepts

Nice-to-have

  • Experience with emulator-based validation
  • Familiarity with HPC or AI system architectures
  • Exposure to lossless Ethernet or RDMA technologies
  • Strong written and verbal communication skills
  • Ability to independently execute validation tasks

Key Requirements

  • Bachelor's or Master's degree in Engineering or Computer Science
  • 4–8 years of experience in VLSI validation or silicon engineering
  • US-based employment eligibility required

Work Rights

US-based employment negotiable

Tailored Resume

Cover Letter