System Dv Engineer

Micron Technology

Asic simulation tools
Advanced verification methods
Uvm system verilog methodology
Work in a team with designers and firmware to create a test environment with an innovative flow to boost System Design Verification efficiency and quality

Job Summary

  • Work in a team with designers and firmware to create a test environment with an innovative flow to boost System Design Verification efficiency and quality.
  • Demonstrate value proposition to left-shift system level integration among hardware, firmware, and system workload.
  • As a Senior Design and Verification automation engineer in the Design Automation group, you will play a role in identifying opportunities for Micron development flow improvement using Agentic AI, driving workflow innovation with Machine Learning and automation.

Matching Summary

Work in a team with designers and firmware to create a test environment with an innovative flow to boost System Design Verification efficiency and quality.

Skills & Requirements

Must-have

  • ASIC simulation tools
  • advanced verification methods
  • UVM System Verilog methodology
  • SoC emulation verification environment
  • build test plans
  • coverage closure

Nice-to-have

  • Agentic AI
  • Machine Learning
  • creative mindset
  • AI/ML knowledge

Key Requirements

  • 5+ years SoC Design Verification experience
  • System C or C++
  • scripting skills
  • B.S. or above in Electrical Engineering or Computer Science

Work Rights

Not specified

Tailored Resume

Cover Letter