Senior Staff Digital Design Engineer – Wireline Phys

Marvell Technology

Toronto, Canada
Base: 118,700 - 158,300 cad; bonus/equity: not spe...
Digital design for phys
Rtl implementation using verilog/systemverilog
Experience in high-speed phy or serdes development
Marvell’s semiconductor solutions are essential building blocks of data infrastructure

Job Summary

  • Marvell’s semiconductor solutions are essential building blocks of data infrastructure.
  • You will play a key role in delivering next-generation PHY solutions for SerDes and Die-to-Die interconnects.
  • This position offers the opportunity to innovate at the boundary of digital, analog, and system design.

Matching Summary

Marvell’s semiconductor solutions are essential building blocks of data infrastructure.

Salary

Base: 118,700 - 158,300 CAD; Bonus/Equity: Not specified; Benefits: Not specified

Skills & Requirements

Must-have

  • Digital design for PHYs
  • RTL implementation using Verilog/SystemVerilog
  • Experience in high-speed PHY or SerDes development

Nice-to-have

  • Strong problem-solving skills
  • Experience with EDA tools
  • Mentorship and leadership abilities

Key Requirements

  • Master’s degree in Electrical Engineering
  • 7+ years of relevant experience
  • Expertise in RTL design and timing closure

Work Rights

Not specified

Tailored Resume

Cover Letter