Senior Memory Mask Designer

NVIDIA

Hybrid
5+ years memory layout experience
Advanced cmos process nodes (3nm, 5nm, 7nm)
Cadence eda tools proficiency
The role involves implementing IC layouts for innovative, high-performance, high-speed CMOS integrated circuits in foundry nodes ranging from 3nm to lower

Job Summary

  • The role involves implementing IC layouts for innovative, high-performance, high-speed CMOS integrated circuits in foundry nodes ranging from 3nm to lower.
  • Candidates will deliver layouts for the Full Custom Memory group, specializing in digital memory circuits with significant digital components.
  • NVIDIA seeks a Senior Memory Mask Design Engineer to join a diverse team dedicated to amplifying human creativity and intelligence through scalable parallel computation.

Matching Summary

The role involves implementing IC layouts for innovative, high-performance, high-speed CMOS integrated circuits in foundry nodes ranging from 3nm to lower.

Skills & Requirements

Must-have

  • 5+ years Memory layout experience
  • Advanced CMOS process nodes (3nm, 5nm, 7nm)
  • Cadence EDA tools proficiency
  • High-speed digital memory circuit design
  • Layout dependent effects knowledge

Nice-to-have

  • Diverse team environment
  • Innovative IC layout practices
  • Full custom memory group specialization

Key Requirements

  • B.E/B Tech / M Tech in Electronics
  • 5+ Years proven experience in Memory layout
  • Detailed knowledge of Cadence EDA tools

Work Rights

Not specified

Tailored Resume

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