Dfx Design Architect

Altera Corporation

Penang, Malaysia
10-12 years dft/dfd experience
Hierarchical dft and scan compression expertise
Ieee 1687 and ieee 1838 standards knowledge
This role serves as the technical authority for defining DFX architectures for Altera's next-generation FPGA and SoC families

Job Summary

  • This role serves as the technical authority for defining DFX architectures for Altera's next-generation FPGA and SoC families.
  • The position requires driving the adoption of advanced DFX features like IEEE 1687 and High-Speed Link Testing to minimize test costs.
  • Candidates must partner with Silicon Architecture and Manufacturing teams globally to ensure world-class quality and accelerated time-to-market.

Matching Summary

This role serves as the technical authority for defining DFX architectures for Altera's next-generation FPGA and SoC families.

Skills & Requirements

Must-have

  • 10-12 years DFT/DFD experience
  • Hierarchical DFT and Scan Compression expertise
  • IEEE 1687 and IEEE 1838 standards knowledge
  • Multi-die chiplet and 2.5D/3D packaging experience
  • Silicon bring-up and failure analysis skills
  • Tessent or Synopsys EDA tool proficiency

Nice-to-have

  • FPGA architecture specific testing understanding
  • ASIL-D functional safety standard experience
  • Mentorship of senior engineering teams
  • Strategic influence on EDA vendor roadmaps
  • Cross-functional global collaboration skills

Key Requirements

  • BS/MS/Ph.D. in Electrical/Electronics/Computer Engineering
  • Minimum 10-12 years hands-on DFT/DFD experience
  • At least 4 years in an architectural or lead capacity
  • Expertise in ASIC and FPGA end-to-end product life cycle

Work Rights

Not specified

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