ZERRO POWER SYSTEMS PTE. LTD. is seeking a Staff Digital IC Design Engineer with extensive experience in RTL-level digital design and verification. The ideal candidate will have a strong background in mixed-signal IC design, proficiency in Verilog, and familiarity with various Cadence tools
Job Summary
The role involves leading RTL-level digital design and problem-solving for mixed-signal integrated circuits.
Candidates will work closely with the backend team on synthesis, place-and-route, and design for test activities.
The position requires defining custom digital interfaces and control logic that interface with analog circuits.
Matching Summary
Match Score: 85
ZERRO POWER SYSTEMS PTE. LTD. is seeking a Staff Digital IC Design Engineer with extensive experience in RTL-level digital design and verification. The ideal candidate will have a strong background in mixed-signal IC design, proficiency in Verilog, and familiarity with various Cadence tools.
Skills & Requirements
Must-have
7-10 years experience in IC design
Fluent Verilog coding and simulation
Custom digital interface implementation
Finite state machine and register map design
Synchronous and asynchronous RTL design
Nice-to-have
Cadence Incisive Enterprise Simulator usage
Experience with Genus and First Encounter tools
Knowledge of Static timing analysis
FPGA verification experience
Leadership of junior engineers
Key Requirements
Bachelor or Master degree in Electronics/Electrical Engineering
7-10 years of working experience in application/validation