Design Verification, Staff Engineer

Marvell Technology

Ho Chi Minh, Vietnam
Base: competitive salary; bonus/equity: 13th-month...
Verification plans for serdes/phy chip designs
Proficiency in systemverilog and uvm
Experience with eda tools like cadence
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world

Job Summary

  • Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world.
  • You will verify all of the circuitry that goes inside our chips for the general market and for specific customers.
  • Competitive salary, plus 13th-month salary and performance-based bonus.

Matching Summary

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world.

Salary

Base: Competitive salary; Bonus/Equity: 13th-month salary and performance-based bonus; Benefits: Premium health & accident insurance

Skills & Requirements

Must-have

  • Verification plans for Serdes/PHY chip designs
  • Proficiency in SystemVerilog and UVM
  • Experience with EDA tools like Cadence

Nice-to-have

  • Mentoring junior engineers
  • Strong problem-solving skills
  • Fluent in English

Key Requirements

  • BS/MS/PhD in Electrical Engineering or related field
  • Understanding of ASIC design flow
  • Experience with high-speed Serdes/PHY interfaces

Work Rights

Not specified

Tailored Resume

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