As a Senior Layout Design Engineer within the DTP AMS group, you will play a pivotal role in delivering best-in-class IO IPs on leading-edge process nodes
Job Summary
As a Senior Layout Design Engineer within the DTP AMS group, you will play a pivotal role in delivering best-in-class IO IPs on leading-edge process nodes.
You will work at the intersection of circuit design, process technology, and automation to achieve aggressive Power, Performance, and Area (PPA) targets.
This role requires a blend of artistic precision in manual layout and a strategic mindset to drive CAD automation and methodology improvements.
Matching Summary
As a Senior Layout Design Engineer within the DTP AMS group, you will play a pivotal role in delivering best-in-class IO IPs on leading-edge process nodes.
Skills & Requirements
Must-have
analog and mixed-signal layouts
chip-level floorplans
signal routing
DRC, LVS, and antenna checks
FinFET and leading-edge process technologies
Cadence Virtuoso, synopsys, Mentor Calibre
physical effects impacting analog performance
Nice-to-have
technical anchor across global sites
scripting automation solutions
cross-functional collaboration
subject matter expert
mentorship and peer review
Key Requirements
Bachelor's degree in Electrical Engineering or related