Standard Cell Design Reliability Verification Engineer
Intel
Bangalore, India
Hybrid
Ir and em flows for standard cells
Synopsys primelib rv, primesimemir
Ansys rhsc and cadence voltus tools
You will participate in the design, development, benchmarking, validation of standard cell libraries using leading process technologies for use in the design of Intel's next-generation SoCs and microprocessors
Job Summary
You will participate in the design, development, benchmarking, validation of standard cell libraries using leading process technologies for use in the design of Intel's next-generation SoCs and microprocessors.
Lead Reliability verification and capabilities for standard cells covering EM, SH, FinFet self-heating; layout compliance for reliability conditions.
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
Matching Summary
You will participate in the design, development, benchmarking, validation of standard cell libraries using leading process technologies for use in the design of Intel's next-generation SoCs and microprocessors.
Skills & Requirements
Must-have
IR and EM flows for Standard cells
Synopsys Primelib RV, PrimesimEMIR
Ansys RHSC and Cadence Voltus tools
Reliability verification in lower nm nodes
Python programming and automation skills
Digital circuit design, CMOS logic
Nice-to-have
Customer oriented and dynamic environment
Collaboration across distributed teams
Develop expertise in new areas
Engineering acumen and analytical skills
Key Requirements
Master's degree with 5+ years experience or PhD with 1+ years experience
Specialization in VLSI
Experience with device level and ASIC designs
Proven track record in establishing RV flows
Experience with FinFet characteristics and Standard Cell Library design