Not specified (assumed to be office-based as no remote or hybrid options were mentioned).
Physical design
Static timing analysis
Dft architecture
NVIDIA is seeking new college graduates for various ASIC engineering roles within its HW Group, focusing on physical design, timing analysis, design-for-test engineering, and power architecture. The ideal candidate will possess strong analytical skills, a solid understanding of digital design concepts, and experience in programming languages
Job Summary
We are hiring across multiple positions in our HW Group for VLSI roles, seeking to bring the brightest young technologists to do their life’s best work.
The Physical Design team drives end-to-end chip implementation from RTL to GDS, including floor planning, PNR, timing closure, and physical verification.
The Timing Team designs and validates high-performance ASICs that power next-generation computing and AI platforms, ensuring robust timing closure and silicon reliability.
Matching Summary
Match Score: 85
NVIDIA is seeking new college graduates for various ASIC engineering roles within its HW Group, focusing on physical design, timing analysis, design-for-test engineering, and power architecture. The ideal candidate will possess strong analytical skills, a solid understanding of digital design concepts, and experience in programming languages.