Senior Logic Design & Verification Engineer

Cisco

Caesarea, Israel
Rtl design experience
Uvm familiarity
Timing methodology analysis
Join the Cisco Silicon One Front-End Design team, at the core of Cisco’s silicon development

Job Summary

  • Join the Cisco Silicon One Front-End Design team, at the core of Cisco’s silicon development.
  • Our engineers cover the full spectrum of chip design, pushing the boundaries of what’s possible.
  • At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era.

Matching Summary

Join the Cisco Silicon One Front-End Design team, at the core of Cisco’s silicon development.

Skills & Requirements

Must-have

  • RTL design experience
  • UVM familiarity
  • timing methodology analysis

Nice-to-have

  • MATLAB simulations experience
  • mixed-signal systems knowledge
  • Clock Domain Crossing expertise

Key Requirements

  • B.Sc./M.Sc. in Electrical Engineering
  • 5+ years of experience
  • hands-on experience with CDC

Work Rights

Not specified

Tailored Resume

Cover Letter