Develops the logic design, register transfer level (RTL) coding, simulation, and integrates the compute IP block for AI SoCs at the full-chip level
Job Summary
Develops the logic design, register transfer level (RTL) coding, simulation, and integrates the compute IP block for AI SoCs at the full-chip level.
Qualifies the design through static design quality checks like lint, CDC, RDC, etc. and optimizes logic to meet power, performance, area, and timing goals.
Reviews the verification plan and implementation to ensure design features are verified correctly and resolves failing RTL tests.
Matching Summary
Develops the logic design, register transfer level (RTL) coding, simulation, and integrates the compute IP block for AI SoCs at the full-chip level.
Skills & Requirements
Must-have
RTL coding and simulation
AI SoC design
Static design quality checks
Logic optimization for power and performance
Unit level verification
Nice-to-have
SoC integration experience
Multiple successful tape-outs
First pass silicon success
Key Requirements
8+ years relevant semiconductor experience (Bachelor's)
7+ years relevant semiconductor experience (Master's)