Senior Asic Design Engineer

NXP USA INC.

Pune, India
On-site
Wireless mac controllers
System level development
Design and verification
NXP USA Inc. is seeking a Senior ASIC Design Engineer to join their Wireless Connectivity team in Pune, India. The role involves working on cutting-edge wireless technology, focusing on the full ASIC design cycle, and requires a strong background in wireless networking protocols and design verification

Job Summary

  • Working in full ASIC design cycle ranging from micro architecture design, RTL coding, verification, synthesis, FPGA prototyping, and silicon bring-up.
  • IP/SoC verification in C/C++, System Verilog, and UVM environment.
  • Solving complex design and verification problems with your innovative ideas.

Matching Summary

Match Score: 85

NXP USA Inc. is seeking a Senior ASIC Design Engineer to join their Wireless Connectivity team in Pune, India. The role involves working on cutting-edge wireless technology, focusing on the full ASIC design cycle, and requires a strong background in wireless networking protocols and design verification.

Skills & Requirements

Must-have

  • wireless MAC controllers
  • system level development
  • design and verification
  • new customer requested features
  • new standard specification feature developments
  • best-in-class performance, area and lower power

Nice-to-have

  • cutting-edge wireless technology
  • passionate and talented engineers
  • tackle the most crucial tasks
  • next-generation of innovations
  • open and inclusive work environment
  • promotes excellence, innovation, collaboration, and integrity

Key Requirements

  • MSEE with 3+ years of experience
  • working knowledge in Bluetooth, IEEE 802.15.4, wireless or other networking controller design and implementation
  • Micro-architecture, Verilog RTL coding, and IP/SoC verification
  • Familiar with ASIC design concept and design flow
  • Fluent in C/C++, System Verilog, and UVM
  • Familiar with SVA assertion and coverage driven verification
  • Small area and low power design experience
  • SOC integration experience
  • Complete product cycle experience from specification to production
  • Hands-on lab experience on FPGA validation and post-silicon bring-up

Work Rights

Not specified

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