Develops the latest & state of the art PCIe/CXL solution for next generation FPGA in the latest process technology node
Job Summary
Develops the latest & state of the art PCIe/CXL solution for next generation FPGA in the latest process technology node.
Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals.
Drives quality assurance compliance for smooth IP/SoC handoff.
Matching Summary
Develops the latest & state of the art PCIe/CXL solution for next generation FPGA in the latest process technology node.
Skills & Requirements
Must-have
RTL design with Verilog and VHDL
logic simulations and design verification
PCIe/CXL solution development
FPGA design and verification
Nice-to-have
highly motivated to learn
exceptional analytical skills
promote innovation and teamwork
self motivated and ability to excel
Key Requirements
Bachelor degree in Electrical, Electronics, Computer Engineering or equivalent
10+ years of experience in RTL design
Experienced in FPGA, custom IC or ASIC design and verification