Asic Verification Engineer, Lund

Axis Communications

Lund, Sweden
Coverage-driven constrained random verification
Systemverilog and uvm
Digital hardware design
The ASIC verification team ensures that the ARTPEC chips are working correctly, before they materialize into an actual chip

Job Summary

  • The ASIC verification team ensures that the ARTPEC chips are working correctly, before they materialize into an actual chip.
  • Developing and maintaining our advanced verification environments requires a good understanding of digital hardware as well as software engineering principles.
  • Axis offers exciting career opportunities, continuous learning, and a collaborative team that values creativity, innovation, and work-life balance.

Matching Summary

The ASIC verification team ensures that the ARTPEC chips are working correctly, before they materialize into an actual chip.

Skills & Requirements

Must-have

  • Coverage-driven Constrained Random Verification
  • SystemVerilog and UVM
  • digital hardware design
  • software engineering principles
  • object-oriented frameworks

Nice-to-have

  • sharing knowledge and ideas
  • creative and collaborative team
  • problem-solving together
  • continuous learning and growth
  • international conferences

Key Requirements

  • at least four years of experience
  • Formal verification experience
  • Programming in Python, C, C++ or SystemC
  • Transaction Level Modeling (TLM)

Work Rights

Not specified

Tailored Resume

Cover Letter