Asic Design Technical Leader – Design & Timing Constraints Focus

Cisco UK

San Jose, US
Base: $168,800.00 - $277,400.00; bonus/equity: ann...
Onsite
Sdc/sta tools and scripting
Timing constraints expertise
Digital design concepts
Join the Cisco Silicon One team in developing a unified silicon architecture for web scale and service provider networks

Job Summary

  • Join the Cisco Silicon One team in developing a unified silicon architecture for web scale and service provider networks.
  • Collaborate with Front-end and Back-end teams to understand chip architecture and guide them in refining design and timing constraints for seamless physical design closure.
  • Cisco offers a unique experience for ASIC engineers, combining the resources of a large organization with the agility of a startup-style team.

Matching Summary

Join the Cisco Silicon One team in developing a unified silicon architecture for web scale and service provider networks.

Salary

Base: $168,800.00 - $277,400.00; Bonus/Equity: Annual bonuses, restricted stock units; Benefits: Medical, dental, vision, 401(k), paid time off

Skills & Requirements

Must-have

  • SDC/STA tools and scripting
  • Timing constraints expertise
  • Digital design concepts
  • Verilog/System Verilog programming
  • Block/full chip SDC development

Nice-to-have

  • Constraint analyzer tools
  • Spyglass CDC and glitch analysis
  • Formal Verification experience
  • Scripting languages proficiency

Key Requirements

  • 8+ years ASIC experience (Bachelor's)
  • 6+ years ASIC experience (Master's)
  • Experience with STA tools like PrimeTime/Tempus
  • Experience with synthesis tools
  • Bachelor's Degree in EE/CE or Master's Degree in EE/CE

Work Rights

Not specified

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