Intel is seeking a Mixed Signal Design Verification Engineer to perform functional verification of mixed signal logic components. The ideal candidate should have a strong background in digital logic and verification methodologies, with experience in VHDL/Verilog/System Verilog.
Base: $122,440.00-232,190.00 USD; Bonus/Equity: Stock bonuses included; Benefits: Health, retirement, and vacation programs
Must-have
Nice-to-have
Not specified