This role leads the physical design and implementation of complex, high-performance semiconductor integrated circuits for NXP's iMCU and Connectivity portfolio
Job Summary
This role leads the physical design and implementation of complex, high-performance semiconductor integrated circuits for NXP's iMCU and Connectivity portfolio.
The engineer is responsible for driving technical solutions, defining methodologies, and ensuring timely delivery of cutting-edge products through comprehensive power and timing analysis.
Candidates must possess extensive experience in back-end implementation tasks including low power strategies, PDN design, and full flow ownership from floor planning to physical verification.
Matching Summary
This role leads the physical design and implementation of complex, high-performance semiconductor integrated circuits for NXP's iMCU and Connectivity portfolio.
Skills & Requirements
Must-have
Power integrity IR drop SNA EM analysis
Floor planning power grid design place route
Static timing analysis STA across corners modes
Low power implementation UPF CPF clock gating
Physical verification DRC LVS Antenna checks
Tcl Python Perl scripting for automation
Nice-to-have
Mentoring junior engineers and cross-functional collaboration
Evaluating new EDA tools for efficiency
Knowledge of advanced tech nodes 16ff and below
Understanding of semiconductor device physics and DFM
Strong problem-solving and debugging skills
Key Requirements
Bachelor's degree with 9+ years experience or Master's with 8+ years
Expert proficiency with Cadence Innovus Synopsys Fusion Compiler ICC2
Experience with Ansys RedHawk PowerSI for power analysis
Solid understanding of process technology effects and DFM/DFY