Lead Solutions Engineer – Runset Enablement (physical Verification)

Cadence

Multiple Locations
On-site
Pegasus drc and lvs runsets
Advanced semiconductor technologies
Automation frameworks for regression execution
Cadence is seeking a Lead Solutions Engineer to focus on runset enablement for physical verification in advanced semiconductor technologies. The role requires expertise in developing and validating DRC and LVS runsets, alongside strong leadership and mentoring capabilities

Job Summary

  • Lead development and validation of Pegasus DRC and LVS runsets for advanced nodes.
  • Architect automation frameworks for regression execution, issue detection, and validation reporting.
  • Provide technical enablement and support for customers on tool usage and advanced methodologies.

Matching Summary

Match Score: 85

Cadence is seeking a Lead Solutions Engineer to focus on runset enablement for physical verification in advanced semiconductor technologies. The role requires expertise in developing and validating DRC and LVS runsets, alongside strong leadership and mentoring capabilities.

Skills & Requirements

Must-have

  • Pegasus DRC and LVS runsets
  • advanced semiconductor technologies
  • automation frameworks for regression execution
  • technical enablement and support for customers
  • scripting languages (TCL, Python, Perl)

Nice-to-have

  • PERC and Fill runsets
  • chip fabrication processes
  • multi-die integration challenges
  • leadership and mentoring capabilities
  • innovative mindset

Key Requirements

  • MS degree with 5+ years of experience or PhD with 3+ years
  • Proven expertise in developing and validating DRC and LVS runsets
  • Proficiency in Linux/Unix environments

Work Rights

Not specified

Tailored Resume

Cover Letter