Responsible for Defining, leading and owning RTL development of a performance efficient, low-power CPU core
Job Summary
Responsible for Defining, leading and owning RTL development of a performance efficient, low-power CPU core.
The candidate will be responsible for all aspects of the design including Functional Features, Performance, Power, and Area.
Partner with a multi-functional engineering team to implement and validate physical design aspects of timing, area, reliability, testability, and power.
Matching Summary
Responsible for Defining, leading and owning RTL development of a performance efficient, low-power CPU core.
Skills & Requirements
Must-have
CPU core microarchitecture
RTL development
performance efficient low-power CPU core
System Verilog, Verilog, VHDL
logic design principles
timing and power implications
Nice-to-have
RISC-V, ARM, MIPS CPU design
Hardware multi-threading
virtualization and SIMD designs
real-time microcontroller designs
high-performance techniques
low-power microarchitecture techniques
scripting language (Perl, Python)
CPU integration at SoC level
Safety and Security microarchitecture
Key Requirements
Master's with 8-11 years of experience
PhD + 5-7 years of work experience
Hands-on working knowledge of pipeline stages
Thorough knowledge of microprocessor architecture
Experience with simulators and waveform debugging tools