Asic Verification Engineer, Lund

AXIS COMMUNICATIONS PTY

Lund, Sweden
Coverage-driven constrained random verification
Systemverilog and uvm
Digital hardware and software engineering principles
We are now looking for passionate senior engineers to join our group of dedicated and competent ASIC Verification Engineers!

Job Summary

  • We are now looking for passionate senior engineers to join our group of dedicated and competent ASIC Verification Engineers!
  • Our verification environments are quite advanced, and developing and maintaining them requires a good understanding of digital hardware as well as software engineering principles.
  • As a fast-growing company, we offer exciting career opportunities. You’ll grow professionally through continuous learning, supported by a collaborative team that values creativity, innovation, and work-life balance.

Matching Summary

We are now looking for passionate senior engineers to join our group of dedicated and competent ASIC Verification Engineers!

Skills & Requirements

Must-have

  • Coverage-driven Constrained Random Verification
  • SystemVerilog and UVM
  • digital hardware and software engineering principles
  • object-oriented frameworks
  • Python for verification tools

Nice-to-have

  • keen interest in programming
  • sharing knowledge and ideas
  • collaborative problem-solving
  • international conference presentations
  • image processing algorithms

Key Requirements

  • at least four years of experience in ASIC verification
  • Formal verification experience
  • Programming in Python, C, C++ or SystemC
  • Transaction Level Modeling (TLM)

Work Rights

Not specified

Tailored Resume

Cover Letter