Support the Content full chip test methods on CMT/HDMT tester platforms, verification, test vector generation, simulation and coverage analysis to guarantee component margin specification
Job Summary
Support the Content full chip test methods on CMT/HDMT tester platforms, verification, test vector generation, simulation and coverage analysis to guarantee component margin specification.
Responsible for ensuring the testability and manufacturability of integrated circuits at both pre-silicon development and post-silicon bring up from 1st Silicon power on to production ramp and high-volume manufacturing stages of Intel’s FPGA products.
Collaborate with worldwide cross functional teams including designers, software, manufacturing and content engineering teams, as you drive for test capability throughout the entire product development cycle.
Matching Summary
Support the Content full chip test methods on CMT/HDMT tester platforms, verification, test vector generation, simulation and coverage analysis to guarantee component margin specification.
Skills & Requirements
Must-have
CMT/HDMT tester platforms
test vector generation
simulation and coverage analysis
pre-silicon development
post-silicon bring up
cross functional teams
Nice-to-have
analytical and problem-solving skills
collaboration and leadership skills
test industry trends
Key Requirements
BS/MS in Electrical Engineering or equivalent
at least 5 years of industry experience
Understanding of test methodology for ASIC, SOC and/or FPGAs