Full Chip Timing Modeling And Integration Engineer

Altera Corporation

Penang, Malaysia
Full chip timing analysis
Timing methodologies development
Static timing analysis (sta)
Develop timing methodologies and execute full-chip timing for Altera’s next generation product lines in advanced process technologies

Job Summary

  • Develop timing methodologies and execute full-chip timing for Altera’s next generation product lines in advanced process technologies.
  • Perform hands-on full chip timing analysis, utilizing design experience and interpersonal skills to solve technical issues and communicate trade-offs.
  • Collaborate with cross-functional teams to define timing modeling strategies, generate high-level timing models, and integrate/validate them.

Matching Summary

Develop timing methodologies and execute full-chip timing for Altera’s next generation product lines in advanced process technologies.

Skills & Requirements

Must-have

  • Full chip timing analysis
  • Timing methodologies development
  • Static Timing Analysis (STA)
  • Silicon modeling concepts
  • Script writing for design automation

Nice-to-have

  • Cross-functional team collaboration
  • Technical issue resolution
  • Continuous improvement drive
  • Aggressive schedule adherence

Key Requirements

  • BS/MS Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
  • 5+ years of relevant experience
  • Experience in SoC development
  • Experience with advanced process nodes
  • Industry standard timing formats
  • Timing modeling and library QA
  • Experience in Python and Tcl
  • 7+ years of SoC Development / Timing Lead Experience (preferred)

Work Rights

Not specified

Tailored Resume

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