Design Verification Engineer - Early Career

Marvell

Westborough, MA, United States
Base: $108,500 - $160,510 py; bonus/equity: employ...
Systemverilog debugging skills
Synopsys vcs simulation experience
Verilog testbench development
You will verify all circuitry inside Marvell's cutting-edge chips used for data infrastructure in cloud, networking, and AI sectors

Job Summary

  • You will verify all circuitry inside Marvell's cutting-edge chips used for data infrastructure in cloud, networking, and AI sectors.
  • The role involves working daily with RTL engineers to debug designs using SystemVerilog and Synopsys VCS until specifications are met.
  • Marvell offers comprehensive benefits including an employee stock purchase plan, family support programs, and robust mental health resources.

Matching Summary

You will verify all circuitry inside Marvell's cutting-edge chips used for data infrastructure in cloud, networking, and AI sectors.

Salary

Base: $108,500 - $160,510 per annum; Bonus/Equity: Employee stock purchase plan available; Benefits: Comprehensive financial well-being, family support, and health resources

Skills & Requirements

Must-have

  • SystemVerilog debugging skills
  • Synopsys VCS simulation experience
  • Verilog testbench development
  • Linux environment proficiency
  • Python scripting capabilities

Nice-to-have

  • Detail-oriented iterative mindset
  • Strong team communication skills
  • Experience with ARM CPU cores

Key Requirements

  • Bachelor's or Master's in Electrical/Computer Engineering
  • 1-2 years of related professional experience
  • Coursework in analog classes and computer architecture
  • Eligibility for US export control access

Work Rights

Must be eligible for US export-controlled information (US citizen, lawful permanent resident, or protected individual)

Tailored Resume

Cover Letter