Senior Engineer, Design Verification Engineering

Analog Devices

Not specified; not specified; competitive compensa...
5-8 years digital design experience
Uvm-based testbench infrastructure from ground up
Functional and code coverage analysis
The role involves verifying key digital blocks in differentiated mixed-signal SOCs targeted for the consumer market with full ownership of the verification lifecycle

Job Summary

  • The role involves verifying key digital blocks in differentiated mixed-signal SOCs targeted for the consumer market with full ownership of the verification lifecycle.
  • Candidates must demonstrate proficiency in developing UVM-based testbench infrastructure from the ground up and achieving functional and code coverage closure.
  • The position offers a collaborative environment focused on professional growth, competitive compensation, and the opportunity to work on cutting-edge projects bridging physical and digital worlds.

Matching Summary

The role involves verifying key digital blocks in differentiated mixed-signal SOCs targeted for the consumer market with full ownership of the verification lifecycle.

Salary

Not specified; Not specified; Competitive compensation and benefits

Skills & Requirements

Must-have

  • 5-8 years digital design experience
  • UVM-based testbench infrastructure from ground up
  • Functional and code coverage analysis
  • AHB/AXI/APB protocol knowledge
  • Scripting languages Python Perl Makefile

Nice-to-have

  • Power aware simulations experience
  • Formal Verification expertise
  • ML techniques for faster turnaround
  • HW emulation or FPGA prototyping
  • Self-starter with minimal direction

Key Requirements

  • Electronic Engineering or Computer Engineering degree
  • 5-8 years progressive experience in digital design
  • Experience collaborating with global product development groups

Work Rights

Must be US Citizen, US Permanent Resident, or protected individual

Tailored Resume

Cover Letter