Asic Design Engineer - New College Grad 2026

NVIDIA

Base: $100,000 - $166,750 (level 1) or $116,000 - ...
Not specified (assumed to be hybrid or fully remote based on industry trends).
Verilog expertise required
Asic design flow understanding
Rtl coding and synthesis skills
NVIDIA is seeking a Logic Design Engineer for its CPU Logic Design Team, aimed at recent graduates in electrical or computer engineering. The role focuses on CPU on-chip interconnect networks and involves tasks such as RTL coding, logic debug, and collaboration with verification teams

Job Summary

  • You will be responsible for CPU on-chip interconnect network, coherency, and last-level caches.
  • The role involves writing readable high performance and low power RTL along with timing closure.
  • NVIDIA offers a dynamic, global team environment impacting product lines from consumer graphics to artificial intelligence.

Matching Summary

Match Score: 85

NVIDIA is seeking a Logic Design Engineer for its CPU Logic Design Team, aimed at recent graduates in electrical or computer engineering. The role focuses on CPU on-chip interconnect networks and involves tasks such as RTL coding, logic debug, and collaboration with verification teams.

Salary

Base: $100,000 - $166,750 (Level 1) or $116,000 - $189,750 (Level 2); Bonus/Equity: Eligible for equity; Benefits: Comprehensive benefits package included

Skills & Requirements

Must-have

  • Verilog expertise required
  • ASIC design flow understanding
  • RTL coding and synthesis skills

Nice-to-have

  • Mentoring junior engineers experience
  • Background in cache coherency
  • High speed interconnects knowledge

Key Requirements

  • BS or MS Degree in Electrical Engineering
  • Experience in processor semiconductor designs
  • Deep understanding of DFT and timing analysis

Work Rights

Not specified

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