Base: $116,000 - $189,750 (level 2) or $136,000 - ...
Micro-architecture documentation
Rtl development using verilog
Logic synthesis and timing analysis
The role involves drafting microarchitecture documents and implementing high-performance, area and power-efficient RTL for SoC and GPU products
Job Summary
The role involves drafting microarchitecture documents and implementing high-performance, area and power-efficient RTL for SoC and GPU products.
Candidates will collaborate with architects and verification teams to deliver world-class builds for diverse IPs including GPU time distribution systems.
NVIDIA offers a competitive base salary ranging from $116,000 to $218,500 depending on the level, along with equity and benefits.
Matching Summary
The role involves drafting microarchitecture documents and implementing high-performance, area and power-efficient RTL for SoC and GPU products.
Salary
Base: $116,000 - $189,750 (Level 2) or $136,000 - $218,500 (Level 3); Bonus/Equity: Eligible for equity; Benefits: Comprehensive benefits package included
Skills & Requirements
Must-have
Micro-architecture documentation
RTL development using Verilog
Logic synthesis and timing analysis
Digital systems and VLSI design
Scripting in Perl or Python
Nice-to-have
Strong C/C++ programming skills
Multi-clock domain experience
Asynchronous logic expertise
Interface protocols knowledge
Outstanding debugging abilities
Key Requirements
BS/MS Degree in Electrical Engineering or Computer Science
2+ years of relevant RTL design work experience
Experience with Computer Architecture and Arithmetic