Asic Design Engineer

Marvell

Multiple Locations
Base: 151,000 - 223,440; bonus/equity: not specifi...
Digital asic design experience
Rtl implementation in systemverilog
High-speed datapath design
Marvell’s semiconductor solutions are essential for data infrastructure

Job Summary

  • Marvell’s semiconductor solutions are essential for data infrastructure.
  • You will shape foundational connectivity technologies and drive technical direction.
  • The role offers comprehensive benefits supporting employees at every stage.

Matching Summary

Marvell’s semiconductor solutions are essential for data infrastructure.

Salary

Base: 151,000 - 223,440; Bonus/Equity: Not specified; Benefits: Not specified

Skills & Requirements

Must-have

  • digital ASIC design experience
  • RTL implementation in SystemVerilog
  • high-speed datapath design

Nice-to-have

  • advanced DSP algorithm implementation
  • experience with FEC architectures
  • previous PHY design experience

Key Requirements

  • 10+ years of industry experience
  • BS/MS in Electrical Engineering
  • strong debug skills across RTL simulation

Work Rights

Not specified

Tailored Resume

Cover Letter